In this paper a continuous-time low-pass analog filter based on the Cascoded Super Source Follower (C-SSF) architecture, implemented in a 28-nm bulk CMOS process, is presented. The target application is the transceiver analog baseband for the next-generation IEEE 802.11ax WiFi standard. To comply with the high-selectivity requirements, a 6th-order Chebyshev transfer function has been implemented as a cascade of three biquadratic cells. The high quality factors required by such topology have been achieved by cascoding the feedback transistor in the standard SSF cell, reducing the quality factor dependence on the output conductance of the source follower transistor. Designed with the Inversion-Coefficient (IC) methodology, the filter is able to operate for channel bandwidths ranging from 10 MHz to 20 MHz by changing its bias current. Measurement results show that the filter has a minimum noise power of -55.1 dBm and a maximum IIP3 of 14 dBm consuming 49 mu W, i.e. 8.17 mu W per pole, occupying an area of 0.0099 mm(2).