VLIW Architectures for Low-Power Processors: a First Evaluation
1998
Details
Title
VLIW Architectures for Low-Power Processors: a First Evaluation
Author(s)
Puiatti, J.-M. ; Piguet, C. ; Sanchez, E. ; Llosa, J.
Published in
ESSCIRC '98 Proceedings of the 24th European Solid-State Circuits Conference
Editor(s)
Pages
436-439
Conference
24th European Solid-State Circuits Conference, The Hague, The Netherlands
Date
1998
Laboratories
LSL
Record Appears in
Scientific production and competences > I&C - School of Computer and Communication Sciences > IC Archives > LSL - Logic Systems Laboratory
Conference Papers
Work produced at EPFL
Published
Conference Papers
Work produced at EPFL
Published
Record creation date
2004-11-30