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  4. Running Efficiently CNNs on the Edge Thanks to Hybrid SRAM-RRAM In-Memory Computing
 
conference paper

Running Efficiently CNNs on the Edge Thanks to Hybrid SRAM-RRAM In-Memory Computing

Rios, Marco Antonio  
•
Ponzina, Flavio  
•
Ansaloni, Giovanni  
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February 1, 2021
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)
DATE 2021 Design, Automation and Test in Europe Conference

The increasing size of Convolutional Neural Networks (CNNs) and the high computational workload required for inference pose major challenges for their deployment on resource-constrained edge devices. In this paper, we address them by proposing a novel In-Memory Computing (IMC) architecture. Our IMC strategy allows us to efficiently perform arithmetic operations based on bitline computing, enabling a high degree of parallelism while reducing energy-costly data transfers. Moreover, it features a hybrid memory structure, where a portion of each subarray, dedicated to storing CNN weights, is implemented as high-density, zero-standby-power Resistive RAM. Finally, it exploits an innovative method for storing quantized weights based on their value, named Weight Data Mapping (WDM), which further increases efficiency. Compared to state-of-the-art IMC alternatives, our solution provides up to 93% improvements in energy efficiency and up to 6x less run-time when performing inference on Mobilenet and AlexNet neural networks.

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DATE2021_Rios_cameraready.pdf

Type

Preprint

Version

Submitted version (Preprint)

Access type

openaccess

License Condition

Copyright

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1.71 MB

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Adobe PDF

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