Steep Slope Transistors for Quantum Computing

In this paper we will present and discuss the potential of steep slope transistors to serve at cryogenic temperature: (i) the electronic design that is needed for qubit error correction and/or interfacing and (ii) to serve as ultra-sensitive charge detectors and potentially replace single electron transistors and/or CMOS for certain electronic functions. We suggest that among the various categories of steep slope devices, the heterojunction tunnel FETs compatible with CMOS platforms form a class of device candidates capable to play an important role in the future quantum computing (QC) down to cryogenic temperatures. The paper will investigate and discuss the potential merits of these devices.


Published in:
Proceedings of the 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM), 56 - 58
Presented at:
IEEE 2nd Electron Devices Technology and Manufacturing Conference - EDTM 2018, Kobe, Japan , 13-16 March 2018
Year:
Jul 31 2018
Publisher:
IEEE
ISBN:
978-1-5386-3712-8
Laboratories:


Note: The status of this file is: Anyone


 Record created 2020-01-27, last modified 2020-10-25

Fulltext:
Download fulltext
PDF

Rate this document:

Rate this document:
1
2
3
 
(Not yet reviewed)