000266029 001__ 266029
000266029 005__ 20190812204802.0
000266029 037__ $$aCONF
000266029 245__ $$aA Design Framework for Thermal-Aware Power Delivery Network in 3D MPSoCs with Integrated Flow Cell Arrays
000266029 260__ $$c2019
000266029 269__ $$a2019
000266029 300__ $$a6
000266029 336__ $$aConference Papers
000266029 520__ $$aIntegrated Flow Cell Array (FCA) technology promises to address the power delivery and heat dissipation challenges in three-dimensional Multi Processor Systems-on-Chips (3D MPSoCs) by providing combined inter-tier liquid cooling and power generation capabilities. In this paper, we present for the first time a design framework to accurately model the temperature-aware power delivery network in 3D MPSoCs, and quantify the effects of FCAs on the voltage drop (IR-drop). This framework estimates the power generation variation along FCAs due to voltage and temperature, in the case of uniform and non-uniform powermaps from several real processor traces. Furthermore, we explore different 3D MPSoC configurations to quantify their power delivery requirements. Our results show that FCAs improve the IR-drop with respect to state-of-the-art design methods up to 53% and 30% for dies with a power consumption of 60W and 190W, respectively, while maintaining their peak temperatures below 52°C, and at no additional Through Silicon Via (TSV) area overhead. In addition, as the presence of high power density regions (hotspots) can decrease the FCAs IR-drop reduction by up to 21% with respect to the average value, we present a scalable TSV placement optimization methodology using the proposed framework. This methodology minimizes the IR-drop at hotspots and guarantees an optimal and uniform exploitation of the IR-drop reduction benefits of FCAs.
000266029 6531_ $$a3D multi-processor systems-on-chip, integrated flow cell arrays, liquid cooling, on-chip power generation, 3D power delivery network design
000266029 700__ $$0251053$$aNajibi, Halima$$g213185
000266029 700__ $$0251558$$aLevisse, Alexandre Sébastien Julien$$g291869
000266029 700__ $$0250076$$aZapater Sancho, Marina$$g264565
000266029 7112_ $$aACM/IEEE International Symposium on Low Power Electronics and Design$$cLausanne, Switzerland$$dJuly 29-31, 2019
000266029 8560_ $$fhalima.najibi@epfl.ch
000266029 8564_ $$zPREPRINT$$uhttps://infoscience.epfl.ch/record/266029/files/ISLPED_2019_Najibi.pdf$$s2020469
000266029 909C0 $$mdavid.atienza@epfl.ch$$mhomeira.salimi@epfl.ch$$0252050$$zMarselli, Béatrice$$xU11977$$pESL
000266029 909CO $$pconf$$pSTI$$ooai:infoscience.epfl.ch:266029
000266029 960__ $$ahalima.najibi@epfl.ch
000266029 961__ $$apierre.devaud@epfl.ch
000266029 973__ $$aEPFL$$rREVIEWED
000266029 980__ $$aCONF
000266029 981__ $$aoverwrite