A 4-Transistor nMOS-Only Logic-Compatible Gain-Cell Embedded DRAM With Over 1.6-ms Retention Time at 700 mV in 28-nm FD-SOI


Published in:
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 65, 4, 1245-1256
Year:
2018
Laboratories:




 Record created 2018-11-08, last modified 2018-12-03


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