Notice détaillée
Titre
EDLAB
Formal Name (French)
Group of Electron Device Modeling and Technology
Formal Name (English)
Group of Electron Device Modeling and Technology
Lab Manager
Sallese, Jean-Michel
Institut
IEM
Faculté
STI
Note
Old institute IEL (>2021) Previous institute: IEL (>2021)
Lien extérieur
http://edlab.epfl.ch/
Publications
A Closed-form Charge-based Expression for Drain Current in Symmetric and Asymmetric Double Gate MOSFET
Charge, Current, and Noise Partitioning in MOSFET in the Presence of Mobility Degradation
Compact Modeling of Anomalous High-Frequency Behavior of MOSFET's Small-Signal NQS Parameters in Presence of Velocity Saturation
Compact Modeling of Gate Sidewall Capacitance of DG-MOSFET
EKV 3.0: an Analog Design-Oriented MOS Transistor Model
Extended Charges Modeling for Deep Submicron CMOS
Measurement and Compact Modeling of 1/f Noise in HV-MOSFETs
Measurement and performance evaluation of a silicon on insulator pixel matrix
Small-Signal Partitioning Scheme in Lateral Asymmetric MOSFET
The EKV 3.0 Compact MOS Transistor Model: Accounting for Deep-Submicron Aspects
Voir toutes les publications (139)
Charge, Current, and Noise Partitioning in MOSFET in the Presence of Mobility Degradation
Compact Modeling of Anomalous High-Frequency Behavior of MOSFET's Small-Signal NQS Parameters in Presence of Velocity Saturation
Compact Modeling of Gate Sidewall Capacitance of DG-MOSFET
EKV 3.0: an Analog Design-Oriented MOS Transistor Model
Extended Charges Modeling for Deep Submicron CMOS
Measurement and Compact Modeling of 1/f Noise in HV-MOSFETs
Measurement and performance evaluation of a silicon on insulator pixel matrix
Small-Signal Partitioning Scheme in Lateral Asymmetric MOSFET
The EKV 3.0 Compact MOS Transistor Model: Accounting for Deep-Submicron Aspects
Voir toutes les publications (139)
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