Details
Title
Meinerzhagen, Pascal Andreas
Sciper ID
160137
Affiliated labs
TCL
Publications
A 15.8 pJ/bit/iter quasi-cyclic LDPC decoder for IEEE 802.11n in 90 nm CMOS
A Sub-VT 2T Gain-Cell Memory for Biomedical Applications
Design and failure analysis of logic-compatible multilevel gain-cell-based DRAM for fault-tolerant VLSI systems
Design of a 12-bit low-power SAR A/D Converter for a Neurochip
FireBird: PowerPC e200 Based SoC for High Temperature Operation
Logic-Compatible Multilevel Gain-Cell-Based DRAM for VLSI-SoCs
Review and Classification of Gain Cell eDRAM Implementations
Standard-Cell Based Memories (SCMs): from Sub-VT to Error-Resilient Systems
Synthesis strategies for sub-VT systems
Towards generic low-power area-efficient standard cell based memory architectures
See complete list of publications (22)
A Sub-VT 2T Gain-Cell Memory for Biomedical Applications
Design and failure analysis of logic-compatible multilevel gain-cell-based DRAM for fault-tolerant VLSI systems
Design of a 12-bit low-power SAR A/D Converter for a Neurochip
FireBird: PowerPC e200 Based SoC for High Temperature Operation
Logic-Compatible Multilevel Gain-Cell-Based DRAM for VLSI-SoCs
Review and Classification of Gain Cell eDRAM Implementations
Standard-Cell Based Memories (SCMs): from Sub-VT to Error-Resilient Systems
Synthesis strategies for sub-VT systems
Towards generic low-power area-efficient standard cell based memory architectures
See complete list of publications (22)
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