Details
Title
Bezati, Endri
Sciper ID
202534
Publications
A Unified Hardware/Software Co-Synthesis Solution for Signal Processing Systems
Design Space Exploration and Implementation of RVC-CAL Applications using the TURNUS framework
Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program
Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs
Hardware and Software Synthesis of Heterogeneous Systems from Dataflow Programs
Hardware/Software Co-Design of Dataflow Programs for Reconfigurable Hardware and Multi-Core Platforms
High-level dataflow design of signal processing systems for reconfigurable and multicore heterogeneous platforms
Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications
Shared-variable Synchronization Approaches for Dynamic Data Flow Programs
Synthesis and optimization of high-level stream programs
See complete list of publications (28)
Design Space Exploration and Implementation of RVC-CAL Applications using the TURNUS framework
Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program
Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs
Hardware and Software Synthesis of Heterogeneous Systems from Dataflow Programs
Hardware/Software Co-Design of Dataflow Programs for Reconfigurable Hardware and Multi-Core Platforms
High-level dataflow design of signal processing systems for reconfigurable and multicore heterogeneous platforms
Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications
Shared-variable Synchronization Approaches for Dynamic Data Flow Programs
Synthesis and optimization of high-level stream programs
See complete list of publications (28)
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