Single-FPGA complete 3D and 2D medical ultrasound imager

3D ultrasound (US) acquisition acquires volumetric images, thus alleviating a classical US imaging bottleneck that requires a highly-trained sonographer to operate the US probe. However, this opportunity has not been explored in practice, since 3D US machines are only suitable for hospital usage in terms of cost, size and power requirements. In this work we propose the first fully-digital, single-chip 3D US imager on FPGA. The proposed design is a complete processing pipeline that includes pre-processing, image reconstruction, and post-processing. It supports up to 1024 input channels, which matches or exceeds state of the art, in an unprecedented estimated power budget of 6.1 W. The imager exploits a highly scalable architecture which can be either downscaled for 2D imaging, or further upscaled on a larger FPGA. Our platform supports both real-time inputs over an optical cable, or test data feeds sent by a laptop running Matlab and custom tools over an Ethernet connection. Additionally, the design allows HDMI video output on a screen.


Publié dans:
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image processing (DASIP)
Présenté à:
2017 Conference on Design and Architectures for Signal and Image processing (DASIP), Dresden, Germany, September 27-29, 2017
Année
2017
Publisher:
IEEE
ISBN:
978-1-5386-3534-6
Laboratoires:


Note: Le statut de ce fichier est: Seulement EPFL


 Notice créée le 2018-01-09, modifiée le 2019-04-16

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