Conference paper

Piezoresistivity characterization of silicon nanowires through monolithic MEMS

This paper presents a monolithic approach for the integration of silicon nanowires (Si NWs) with microelectromechanical systems (MEMS). The process is demonstrated for the case of co-fabrication of Si NWs with a 10-μm-thick MEMS on the same silicon-on-insulator (SOI) wafer. MEMS is designed in the form of a characterization platform with an electrostatic actuator and a mechanical amplifier spanned by a single Si NW. This integrated platform is utilized for the successful measurement of Si NW piezoresistive gauge factor (GF) under a uniform uniaxial stress. Available techniques in this field include: Indirect (substrate) or direct (actuator) bending of Si NW necessitating rigorous models for the conversion of load to stress, inanomanipulation and attachment of Si NW on MEMS, a non-monolithic technique posing residual stress and alignment issues, and heterogeneous integration with separate Si layers for Si NW and MEMS, where a single SOI is not sufficient for the end product. Providing a monolithic solution to the integration of micro and nanoscale components, the presented technique successfully addresses the shortcomings of similar studies. In addition to providing a solution for electromechanical characterization, the technique also sets forth a promising pathway for multiscale, functional devices produced in a batch-compatible fashion, as it facilitates co-fabrication within the same Si crystal.


    • EPFL-CONF-232512

    Record created on 2017-11-21, modified on 2017-11-21


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