Semiconductor based high resistance

The field of invention is in the area of MOS integrated circuits operating with very low currents in the weak inversion region or sub threshold. The method aims at providing linear resistor with a value in the multi-mega ohm range. In order to produce Silicon based high resistance value, the claimed invention provides a semiconductor resistance using MOS transistor comprising a gate, drain, source and body terminals wherein the body terminal is tied to the drain terminal, the voltage applied between the source and the gate defining the resistance value.

Other identifiers:
EPO Family ID: 38293112
TTO: 6.0682
Patent number(s):

 Record created 2017-06-13, last modified 2018-03-17

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