Methods and systems for power-efficient inductive chip-to-chip communications
Shokrollahi, Amin; Cronie, Harm; Ulrich, Roger
2015

Abstract

Digital information is communicated between stacked integrated circuit devices by inductive coupling between arrays of inductors formed from integrated circuit wiring layers. This can be done using a combination of push-pull drivers, common inductor return legs, and balanced sparse ternary encoding. Embodiments result in low power utilization and high pin efficiency.

Details

Title Methods and systems for power-efficient inductive chip-to-chip communications
Author(s) Shokrollahi, Amin ; Cronie, Harm ; Ulrich, Roger
Date 2015
Keywords
Note Alternative title(s) : (de) Leistungs- und pineffiziente chip-to-chip-kommunikation mit gleichtaktunterdrückung und sso-widerstandsfähigkeit (fr) Communications de puce à puce efficaces en puissance et en broches à réjection du mode commun et résilience sso (en) Power and pin efficient chip-to-chip communications with common-mode rejection and sso resilience
Other identifier(s) EPO Family ID: 61898886
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Additional link USPTO link
Laboratories ALGO
Record Appears in Scientific production and competences > I&C - School of Computer and Communication Sciences > IINFCOM > ALGO - Algorithmics Laboratory
Scientific production and competences > SB - School of Basic Sciences > Mathematics
Work outside EPFL
Patents
Record creation date 2016-12-14

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