Avalanche Microwave Noise Sources in Commercial 90-nm CMOS Technology

This paper presents a microwave noise source implemented in a commercial CMOS technology. The circuit is based on the avalanche noise generated by both the source-to-bulk and the drain-to-bulk junctions in reverse breakdown. Two sources of different junction area are fabricated using a standard NMOS transistor in 90-nm CMOS technology having a width of 5- and 20-μm, respectively. From the experimental characterization emerges that the breakdown voltage of the source/drain to bulk diodes is 12.4 V, whereas excess noise ratios (ENRs) of 20 dB (5-μm source) and of 25 dB (20-μm source) are observed at 24 GHz for a current density of about 0.14 mA per square micrometer. Finally, a theoretical explanation of the observed behaviors is proposed by means of an equivalent circuit. The developed noise source can be used in a CMOS system-on-chip (SoC) for a variety of applications ranging from the built-in self test (BIST) of the RF chain to the calibration of fully integrated microwave radiometric sensor.


Published in:
IEEE Transactions on Microwave Theory and Techniques, 1-10
Year:
2016
Publisher:
Piscataway, Institute of Electrical and Electronics Engineers
ISSN:
1557-9670
Keywords:
Laboratories:




 Record created 2016-05-04, last modified 2018-03-18


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