Technology mapping of reversible circuits to Clifford+T quantum circuits

The Clifford+T quantum gate library has attracted much interest in the design of quantum circuits, particularly since the contained operations can be implemented in a fault-tolerant manner. Since fault tolerant implementations of the T gate have very high latency, synthesis and optimization are aiming at minimizing the number of T stages, referred to as the T-depth. In this paper, we present an approach to map mixed polarity multiple controlled Toffoli gates into Clifford+T quantum circuits. Our approach is based on the multiple control Toffoli mapping algorithms proposed by Barenco et al., which are given T-depth optimized Clifford+T translations. Experiments show that our approach leads to a significant T-depth reduction of 54% on average.


Published in:
Proceedings of the IEEE International Symposium on Multi-Valued Logic (ISMVL)
Presented at:
IEEE International Symposium on Multi-Valued Logic (ISMVL), Sapporo, Japan, May 18-20, 2016
Year:
2016
Publisher:
Los Alamitos, IEEE
ISBN:
978-1-4673-9488-8
Laboratories:




 Record created 2016-02-16, last modified 2018-03-17


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