Digital Synchronization for Symbol-spaced IEEE802.11ad Gigabit mmWave Systems

A complete digital synchronization architecture for an IEEE 802.11ad compliant 60 GHz receiver is presented. The characteristics of mmWave systems require a holistic view on the problem of parameter estimation, such that not each parameter is dealt with on its own, but in the context of the complete receiver architecture. To this end the proposed synchronization unit covers packet detection, frequency offset compensation, signal-to-interference-plus-noise (SINR) maximization, frame synchronization, and channel estimation. The presented architecture is especially suitable for low-complexity time domain receivers, which are the most power efficient systems for mmWave, but have high demands in terms of synchronization. A novel two step synchronization procedure takes the specific requirements of the employed equalization and detection stages into account, to maximize the overall system performance. Performance is further improved by a heuristic sampling phase alignment mechanism which search the best sampling phase in order to increase the effective SINR in finite length receivers.

Published in:
2015 22nd IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 637-640
Presented at:
2015 22nd IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Cairo, Egypt, December 06-09, 2015

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 Record created 2015-12-14, last modified 2020-07-29

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