Design and Benchmarking of Hybrid CMOS-Spin Wave Device Circuits Compared to 10nm CMOS

In this paper, we present a design and benchmarking methodology of Spin Wave Device (SWD) circuits based on micromagnetic modeling. SWD technology is compared against a 10nm FinFET CMOS technology, considering the key metrics of area, delay and power. We show that SWD circuits outperform the 10nm CMOS FinFET equivalents by a large margin. The area-delay-power product (ADPP) of SWD is smaller than CMOS for all benchmarks from 2.5× to 800×. On average, the area of SWD circuits is 3.5× smaller and the power consumption is two orders of magnitude lower compared to the 10nm CMOS reference circuits.

Published in:
Proceedings of the 15th International IEEE Conference on Nanotechnology (NANO)
Presented at:
15th International IEEE Conference on Nanotechnology (NANO), Rome, Italy, July 27-30, 2015

 Record created 2015-09-08, last modified 2018-01-28

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