000207975 001__ 207975
000207975 005__ 20190317000155.0
000207975 0247_ $$2doi$$a10.1109/NANOARCH.2015.7180585
000207975 037__ $$aCONF
000207975 245__ $$aNEM Relay Design with Biconditional Binary Decision Diagrams
000207975 269__ $$a2015
000207975 260__ $$bIEEE$$c2015
000207975 336__ $$aConference Papers
000207975 520__ $$aIn this paper, we present an improved design flow for nanoelectromechanical (NEM) relay-based combinational logic circuits. Six-terminal NEM relays can be programmed to act as 2-to-1 multiplexers. We can therefore use NEM relays to implement arbitrary combinational logic circuits. Previously, traditional logic synthesis techniques based on Binary Decision Diagrams (BDDs) have been used to map arbitrary logic functions to NEM relays. We improve this approach by showing how six-terminal relays can also be viewed as 2-to-1 multiplexers fed by comparators. This allows us to create a mapping from Biconditional BDDs (BBDDs) to NEM relays. We then show how it is possible to improve the BDD-based design flow, by presenting a methodology based on BBDD logic synthesis techniques. Experimental results show that our BBDD-based design flow reduces the average number of relays by 24% and the average critical path length by 12%. Considering an 8x8 array multiplier with different mechanical delay implementations, we show a 33% average relay count reduction.
000207975 700__ $$aHaaswijk, Winston
000207975 700__ $$aAmarù, Luca
000207975 700__ $$aGaillardon, Pierre-Emmanuel
000207975 700__ $$0240269$$g167918$$aDe Micheli, Giovanni
000207975 7112_ $$dJuly 8-10, 2015$$cBoston, Massachusetts, USA$$aIEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH '15)
000207975 773__ $$tProceedings of the IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH '15)$$q45-50
000207975 8564_ $$uhttps://infoscience.epfl.ch/record/207975/files/WH_NANOARCH15.pdf$$zn/a$$s426468$$yn/a
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000207975 937__ $$aEPFL-CONF-207975
000207975 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000207975 980__ $$aCONF