Heterogeneous Integration of ReRAM Crossbars in 180nm CMOS BEoL Process

This work reports on a heterogeneous integration of resistive memories into the Back-End-of-the-Line of 180nm standard CMOS foundry chips. A TaOx-based ReRAM technology with materials and processes fully CMOS compatible has been developed and characterized. A low-cost integration method is applied to the developed TaOx-based memories to achieve chip level ReRAM-CMOS integration. The integrated memory devices show working voltages compatible with CMOS circuits operations. Measured SET and RESET voltages of the ReRAM integrated cells are -1V and +1.3V, respectively, demonstrating suitability for low-voltage applications.


Published in:
Microelectronic Engineering, 145, 9, 62-65
Year:
2015
Publisher:
Amsterdam, Elsevier
ISSN:
0167-9317
Keywords:
Laboratories:


Note: The status of this file is: EPFL only


 Record created 2015-03-10, last modified 2018-12-03

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