Compact Modeling of Homojunction Tunnel FETs
Aggressive scaling of the supply voltage reduces the energy needed for switching of standard CMOS devices. However, advanced CMOS technologies are facing two main problems that consequently lead to higher power consumption: the complexity of a further supply voltage reduction, and the rising leakage currents that directly affect the switching ratio between the ON and OFF states. At present, the available field-effect transistors (FETs) in the CMOS integrated circuits require at room temperature at least 60 mV of gate voltage to increase the current by one order of magnitude. Recent publications have highlighted the need for alternative devices providing better ON-OFF switching performance. Tunneling FETs are very promising devices to respond to the demanding requirements of future scaled silicon technology nodes. The paper reviews recent compact modeling of homojunction TFET devices.