000204799 001__ 204799
000204799 005__ 20190317000103.0
000204799 037__ $$aPOST_TALK
000204799 245__ $$aRestructuring of Arithmetic Circuits with Biconditional Binary Decision Diagrams
000204799 269__ $$a2014
000204799 260__ $$c2014
000204799 336__ $$aPosters
000204799 520__ $$a<i>Biconditional Binary Decision Diagrams</i> (BBDDs) are a novel class of canonical binary decision diagrams where the branching condition, and its associated logic expansion is <i>biconditional</i> on two variables. In this demonstration we use an efficient BBDD manipulation package as front-end to a commercial synthesis tool to restructure arithmetic operations in critical components of telecommunication circuits. We show that our approach meets tight timing constraints otherwise beyond the capabilities of traditional synthesis methods.
000204799 700__ $$aAmarù, Luca
000204799 700__ $$aBalatsoukas Stimming, Alexios
000204799 700__ $$aGaillardon, Pierre-Emmanuel
000204799 700__ $$0245488$$g194090$$aBurg, Andreas
000204799 700__ $$0240269$$g167918$$aDe Micheli, Giovanni
000204799 7112_ $$dMarch 24-28, 2014$$cDresden, Germany$$aUniversity Booth at DATE 2014
000204799 8564_ $$uhttps://infoscience.epfl.ch/record/204799/files/2593.pdf$$zn/a$$s94446$$yn/a
000204799 909C0 $$xU11140$$0252283$$pLSI1
000204799 909C0 $$0252398$$pTCL$$xU12395
000204799 909CO $$qGLOBAL_SET$$pSTI$$pIC$$pposter$$ooai:infoscience.tind.io:204799
000204799 917Z8 $$x112915
000204799 937__ $$aEPFL-POSTER-204799
000204799 973__ $$aEPFL
000204799 980__ $$aPOSTER