Low-Voltage Read/Write Circuit Design for Transistorless ReRAM Crossbar Arrays in 180nm CMOS Technology
Sandrini, Jury; Demirci, Tugba; Thammasack, Maxime Victor; Sacchetto, Davide; Leblebici, Yusuf
2015

Abstract

This paper presents a read-write design solution for passive ReRAM crossbar memory arrays to overcome the sneak current paths problem. The proposed circuitry includes an auto-calibration feature to overcome the sneak current effects during the READ operation, and a WRITE protocol to minimize the current at each row and column lines. The presented circuit has been designed in 180 nm standard CMOS technology based on the electrical characteristics of fabricated ReRAM devices.

Details

Title Low-Voltage Read/Write Circuit Design for Transistorless ReRAM Crossbar Arrays in 180nm CMOS Technology
Author(s) Sandrini, Jury ; Demirci, Tugba ; Thammasack, Maxime Victor ; Sacchetto, Davide ; Leblebici, Yusuf
Published in Proceedings of 2015 IEEE International Symposium on Circuits and Systems (ISCAS)
Pages 9-12
Conference 2015 IEEE International Symposium on Circuits and Systems (ISCAS 2015), Lisbon, Portugal, May 24-27, 2015
Date 2015
DOI https://doi.org/10.1109/ISCAS.2015.7168557
Laboratories LSM
Record Appears in Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date 2015-01-22

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