Low-Voltage Read/Write Circuit Design for Transistorless ReRAM Crossbar Arrays in 180nm CMOS Technology

This paper presents a read-write design solution for passive ReRAM crossbar memory arrays to overcome the sneak current paths problem. The proposed circuitry includes an auto-calibration feature to overcome the sneak current effects during the READ operation, and a WRITE protocol to minimize the current at each row and column lines. The presented circuit has been designed in 180 nm standard CMOS technology based on the electrical characteristics of fabricated ReRAM devices.


Published in:
Proceedings of 2015 IEEE International Symposium on Circuits and Systems (ISCAS 2015)
Presented at:
2015 IEEE International Symposium on Circuits and Systems (ISCAS 2015), Lisbon, Portugal, May 24-27, 2015
Year:
2015
Laboratories:




 Record created 2015-01-22, last modified 2018-01-28


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