A 15 mu W 5.5 kS/s Resistive Sensor Readout Circuit with 7.6 ENOB

A low power SAR logic-based resistive sensor readout circuit is proposed. A high sensitivity thermistor is used for local temperature measurements. The need for a low-noise front-end voltage amplifier is avoided by employing time-domain operation. In each operation step the sensor resistance is compared with the value of a reference resistive DAC which is implemented on chip. Therefore no stable, temperature compensated reference voltage is needed for operation. Furthermore the chip is operational with supply voltages ranging from 1.2 to 1.8 volts. Detailed analyses of the circuit gain and noise are provided. In addition, the effect of circuit topology on the noise performance is discussed. The effect of noise on accuracy of the circuit is also negligible due to resetting the charge-integrating capacitor after each comparison. A prototype chip is fabricated in 0.18-mu m CMOS. The circuit dissipates 15 mu W with 5.5 kS/s conversion rate from a 1.5 V supply. The complete interface circuit has 14 pJ/c-s figure of merit and 7.6 effective number of bits.

Publié dans:
Ieee Transactions On Circuits And Systems I-Regular Papers, 61, 12, 3321-3329
Piscataway, Institute of Electrical and Electronics Engineers

 Notice créée le 2014-12-30, modifiée le 2020-04-20

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