000202206 001__ 202206
000202206 005__ 20190509132514.0
000202206 0247_ $$2doi$$a10.5075/epfl-thesis-6386
000202206 02470 $$2urn$$aurn:nbn:ch:bel-epfl-thesis6386-0
000202206 02471 $$2nebis$$a10256922
000202206 037__ $$aTHESIS
000202206 041__ $$aeng
000202206 088__ $$a6386
000202206 245__ $$aEnergy Efficient VLSI Circuits for MIMO-WLAN
000202206 269__ $$a2014
000202206 260__ $$bEPFL$$c2014$$aLausanne
000202206 336__ $$aTheses
000202206 502__ $$aProf. D. Atienza Alonso (président) ; Prof. A. P. Burg (directeur) ; Prof. H. Bölcskei,  Prof. Y. Leblebici,  Prof. H. Meyr (rapporteurs)
000202206 520__ $$aMobile communication - anytime, anywhere access to data and communication services - has been continuously increasing since the operation of the first wireless communication link by Guglielmo Marconi. The demand for higher data rates, despite the limited bandwidth, led to the development of multiple-input multiple-output (MIMO) communication which is often combined with orthogonal frequency division multiplexing (OFDM). Together, these two techniques achieve a high bandwidth efficiency. Unfortunately, techniques such as MIMO-OFDM significantly increase the signal processing complexity of transceivers. While fast improvements in the integrated circuit (IC) technology enabled to implement more signal processing complexity per chip, large efforts had and have to be done for novel algorithms as well as for efficient very large scaled integration (VLSI) architectures in order to meet today's and tomorrow's requirements for mobile wireless communication systems. In this thesis, we will present architectures and VLSI implementations of complete physical (PHY) layer application specific integrated circuits (ASICs) under the constraints imposed by an industrial wireless communication standard. Contrary to many other publications, we do not elaborate individual components of a MIMO-OFDM communication system stand-alone, but in the context of the complete PHY layer ASIC. We will investigate the performance of several MIMO detectors and the corresponding preprocessing circuits, being integrated into the entire PHY layer ASIC, in terms of achievable error-rate, power consumption, and area requirement. Finally, we will assemble the results from the proposed PHY layer implementations in order to enhance the energy efficiency of a transceiver. To this end, we propose a cross-layer optimization of PHY layer and medium access control (MAC) layer.
000202206 6531_ $$aMIMO
000202206 6531_ $$aOFDM
000202206 6531_ $$aVLSI Systems
000202206 6531_ $$aASIC
000202206 6531_ $$apreprocessing circuits for MIMO detectors
000202206 6531_ $$aPHY layer
000202206 6531_ $$aenergy efficiency
000202206 6531_ $$amatrix decompositions
000202206 6531_ $$alattice reduction
000202206 6531_ $$aSeysen's algorithm
000202206 700__ $$0245489$$g209847$$aSenning, Carl Christian Sten Dominic
000202206 720_2 $$aBurg, Andreas Peter$$edir.$$g194090$$0245488
000202206 8564_ $$uhttps://infoscience.epfl.ch/record/202206/files/EPFL_TH6386.pdf$$zn/a$$s4539756$$yn/a
000202206 909C0 $$xU12395$$0252398$$pTCL
000202206 909CO $$pthesis$$pthesis-bn2018$$pDOI$$ooai:infoscience.tind.io:202206$$qDOI2$$qGLOBAL_SET$$pSTI
000202206 917Z8 $$x108898
000202206 917Z8 $$x108898
000202206 918__ $$dEDEE$$cIEL$$aSTI
000202206 919__ $$aTCL
000202206 920__ $$b2014$$a2014-10-31
000202206 970__ $$a6386/THESES
000202206 973__ $$sPUBLISHED$$aEPFL
000202206 980__ $$aTHESIS