Abstract

A CMOS compatible Ge photodetector (Ge-PD) fabricated on Si substrates has been shown to be suitable for near infrared (NIR) sensing; linear and avalanche detection, in both proportional and Geiger modes have been demonstrated, for photon counting at room temperature [1]. This paper focuses on implementations of the technology for the fabrication of imaging arrays of such detectors with high reproducibility and yield. The process involves selective chemical vapor deposition (CVD) of a ~ 1-μm-thick n-type Ge crystal on a Si substrate at 700°C, followed by deposition of a nm-thin Ga and B layer-stack (so-called PureGaB), all in the same deposition cycle. The PureGaB layer fulfills two functions; firstly, the Ga forms an ultrashallow p+n junction on the surface of Ge islands that allows highly sensitive NIR photodiode detection in the Ge itself; secondly, the B-layer forms a barrier that protects the Ge/Ga layers against oxidation when exposed to air and against spiking during metallization. A design for patterning the surrounding oxide is developed to ensure a uniform selective growth of the Ge crystalline islands so that the wafer surface remains flat over the whole array and any Ge nucleation on SiO2 surface is avoided. This design can deliver pixel sizes up to 30×30 μm2 with a Ge fill factor of up to 95 %. An Al metallization is used to contact each of the photodiodes to metal pads located outside the array area. A new process module has been developed for removing the Al metal on the Ge-islands to create an oxide-covered PureGaB-only front-entrance window without damaging the ultrashallow junction; thus the sensitivity to front-side illumination is maximized, especially at short wavelengths. The electrical I-V characteristics of each photodetector pixel are, to our knowledge, the best reported in literature with ideality factors of ~1.05 with Ion/Ioff ratios of 108. The uniformity is good and the yield is close to 100% over the whole array.

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