10.3 A 7.5mW 7.5Gb/s Mixed NRZ/Multi-Tone Serial Data Transceiver for Multi-Drop Memory Interfaces in 40nm CMOS

Advancements in CMOS technology have enabled exponential growth of computational power. However, data processing efficiency also relies on sufficient data communication bandwidth between different units of a computing system. Memory systems typically apply dual in-line memory modules (DIMMs) because of their high capacity and low cost. However, the multi-drop bus (MDB) interface between these units and the controller is challenging for bandwidth and power reasons. Multi-tone signaling has promising characteristics for this type of interface. To keep up with the ever growing demand for higher bandwidth in multi-drop buses, we develop a 7.5Gb/s (3.75Gb/s/pin) NRZ/multi-tone (NRZ/MT) transceiver with a total link power efficiency of 1mW/Gb/s.


Published in:
2015 IEEE International Solid-State Circuits Conference Digest Of Technical Papers (ISSCC), 180-181
Presented at:
International Solid-State Circuits Conference (ISSCC) 2015, San Francisco, CA, February 22-26, 2015
Year:
2015
Publisher:
IEEE
ISBN:
978-1-4799-6223-5
Laboratories:


Note: The status of this file is: EPFL only


 Record created 2014-10-14, last modified 2018-01-28

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