000201913 001__ 201913
000201913 005__ 20190317000012.0
000201913 0247_ $$2doi$$a10.1109/ISCAS.2014.6865471
000201913 020__ $$a978-1-4799-3431-7
000201913 02470 $$2ISI$$a000346488600417
000201913 037__ $$aCONF
000201913 245__ $$aTSPC Flip-Flop Circuit Design with Three-Independent-Gate Silicon Nanowire FETs
000201913 269__ $$a2014
000201913 260__ $$bIEEE$$c2014
000201913 336__ $$aConference Papers
000201913 520__ $$aTrue Single-Phase Clock (TSPC) Flip-Flops, based on dynamic logic implementation, are area-saving and high-speed compared to standard static flip-flops. Furthermore, logic gates can be embedded into TSPC flip-flops which significantly improves performance. As a promising approach to keep the pace of Moore's Law, functionality-enhanced devices with multiple independent gates have drown many recent interests. In particular, Three-Independent-Gate Silicon Nanowire FETs (TIG SiNWFETs) can realize the functionality of two serial transistors in a single device. Therefore, they open new opportunities to compact designs in both arithmetic and control circuits. In this paper, we propose TSPC flip-flop implementation with asynchronous set and reset using the compactness of TIG SiNWFET. Electrical simulations show that TIG SiNWFET-based TSPC flip-flop improves nearly 20%, 30% and 7% in area, delay and leakage power respectively as compared to its LSTP FinFET counterpart at 22nm.
000201913 6531_ $$aCMOS integrated circuits
000201913 6531_ $$aclocks
000201913 6531_ $$adelays
000201913 6531_ $$afield affect transistors
000201913 6531_ $$alogic gates
000201913 6531_ $$asilicon
000201913 700__ $$0247487$$g214644$$aTang, Xifan
000201913 700__ $$0245831$$g212096$$aZhang, Jian
000201913 700__ $$aGaillardon, Pierre-Emmanuel
000201913 700__ $$aDe Micheli, Giovanni$$g167918$$0240269
000201913 7112_ $$dJune 1-5, 2014$$cMelbourne, Austrailia$$aIEEE International Symposium on Circuits and Systems (ISCAS)
000201913 773__ $$tProceedings of the IEEE International Symposium on Circuits and Systems (ISCAS)$$q1660-1663
000201913 8564_ $$uhttps://infoscience.epfl.ch/record/201913/files/06865471.pdf$$zn/a$$s623705$$yn/a
000201913 909C0 $$xU11140$$0252283$$pLSI1
000201913 909CO $$pIC$$qGLOBAL_SET$$ooai:infoscience.tind.io:201913$$pconf$$pSTI
000201913 917Z8 $$x112915
000201913 917Z8 $$x112915
000201913 937__ $$aEPFL-CONF-201913
000201913 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000201913 980__ $$aCONF