000201907 001__ 201907
000201907 005__ 20190416055543.0
000201907 037__ $$aCONF
000201907 245__ $$aA High-Performance Low-Power Near-Vt RRAM-based FPGA
000201907 269__ $$a2014
000201907 260__ $$c2014
000201907 336__ $$aConference Papers
000201907 520__ $$aThe routing architecture, heavily using programmable switches, dominates the area, delay and power of <i>Field Programmable Gate Arrays</i> (FPGAs). <i>Resistive Random Access Memories</i> (RRAMs) enable high-performance routing architectures through the replacement of <i>Static Random Access Memory</i> (SRAM)-based programming switches. Exploiting the very low <i>on</i>-resistance state achievable by RRAMs, RRAM-based routing multiplexers can be used to significantly reduce the FPGA routing delays. In addition, RRAM-based routing architectures are less sensitive to supply voltage reductions and show promises in low-power FPGA designs. In this paper, we propose a near- V<sub>t</sub> low-power RRAM-based FPGA where both delay and power reductions are achieved. Experimental results demonstrate that a near-V<sub>t</sub> RRAM-based FPGA design leads to a 15% area shrink, a 10% delay reduction, and a 65% power improvement, compared to a conventional FPGA design for a given technology node. To achieve low <sub>on</sub>-resistance values, RRAMs typically require high programming currents. In other word, they need relatively large programming transistors, potentially resulting in area, delay and power inefficiencies. We also present a design methodology to properly size the programming transistors of RRAMs in order to further improve the area-efficiency. Experimental results show that a correct programming transistor sizing strategy contributes to further 18% area and 2% delay shrink, compared to the initial near-V<sub>t</sub> RRAM-based FPGA.
000201907 700__ $$0247487$$g214644$$aTang, Xifan
000201907 700__ $$aGaillardon, Pierre-Emmanuel
000201907 700__ $$aDe Micheli, Giovanni$$g167918$$0240269
000201907 7112_ $$dDecember 10-12, 2014$$cShanghai, China$$aInternational Conference on Field-Programmable Technology (FPT)
000201907 773__ $$tProceedings of the International Conference on Field-Programmable Technology (FPT)
000201907 8564_ $$uhttps://infoscience.epfl.ch/record/201907/files/XT_FPT14.pdf$$zn/a$$s559951$$yn/a
000201907 909C0 $$xU11140$$0252283$$pLSI1
000201907 909CO $$pIC$$ooai:infoscience.tind.io:201907$$qGLOBAL_SET$$pconf$$pSTI
000201907 917Z8 $$x112915
000201907 917Z8 $$x112915
000201907 937__ $$aEPFL-CONF-201907
000201907 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000201907 980__ $$aCONF