000201890 001__ 201890
000201890 005__ 20190331192700.0
000201890 0247_ $$2doi$$a10.1109/TCSI.2014.2334891
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000201890 02470 $$2ISI$$a000344467500011
000201890 037__ $$aARTICLE
000201890 245__ $$aEnergy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design
000201890 269__ $$a2014
000201890 260__ $$bInstitute of Electrical and Electronics Engineers$$c2014$$aPiscataway
000201890 300__ $$a10
000201890 336__ $$aJournal Articles
000201890 520__ $$aThe total power budget of Ultra-Low Power (ULP) VLSI Systems-on-Chip (SoCs) is often dominated by the leakage power of embedded memories as well as status registers. On the one hand, supply voltage scaling down to the near-threshold (near-<i>V</i><sub>T</sub>) or even to the subthreshold (sub-<i>V</i><sub>T</sub>) domain is a commonly used, efficient technique to reduce both leakage power and active energy dissipation. On the other hand, emerging CMOS-compatible device technologies such as Resistive Memories (ReRAMs) enable non-volatile, on-chip data storage and zero-leakage sleep periods. For the first time, we present and compare ReRAM-based Non-Volatile Flip-Flop (NVFF) topologies which are optimized for low-voltage operation (including near-<i>V</i><sub>T</sub>	and sub-<i>V</i><sub>T</sub> operation). Three low-voltage NVFF circuit topologies are proposed and evaluated in terms of energy dissipation and reliability. Using topologies with two complementary programmed ReRAM devices, Monte Carlo simulations accounting for parametric variations confirm reliable data restore operation from the ReRAM devices at a sub-	voltage as low as 400 mV. A topology using a single ReRAM device exhibits lower write energy, but requires a near-	voltage for robust read. Energy characterization is performed at nominal, near-<i>V</i><sub>T</sub>	, and sub-<i>V</i><sub>T</sub> supply voltages. The minimum energy point is reached for near-<i>V</i><sub>T</sub> read operation with a total read+write energy of 735 fJ.
000201890 6531_ $$aFlip-flops
000201890 6531_ $$alow-power electronics
000201890 6531_ $$anonvolatile memory
000201890 700__ $$aKazi, Ibrahim
000201890 700__ $$aMeinerzhagen, Pascal
000201890 700__ $$aGaillardon, Pierre-Emmanuel
000201890 700__ $$0242417$$g181895$$aSacchetto, Davide
000201890 700__ $$0240162$$g112194$$aLeblebici, Yusuf
000201890 700__ $$g194090$$aBurg, Andreas$$0245488
000201890 700__ $$aDe Micheli, Giovanni$$g167918$$0240269
000201890 773__ $$j61$$tIEEE Transactions on Circuits and Systems Part 1 Regular Papers$$k11$$q3155-3164
000201890 8564_ $$uhttps://infoscience.epfl.ch/record/201890/files/06857429_final.pdf$$zn/a$$s1980617$$yn/a
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000201890 909CO $$qGLOBAL_SET$$pSTI$$pIC$$particle$$ooai:infoscience.tind.io:201890
000201890 917Z8 $$x112915
000201890 917Z8 $$x112915
000201890 917Z8 $$x112194
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000201890 937__ $$aEPFL-ARTICLE-201890
000201890 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000201890 980__ $$aARTICLE