Speed/Power/Area Trade-offs for High Speed Inter Layer Data Transmission in 3D Stacked ICs
2014
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Details
Title
Speed/Power/Area Trade-offs for High Speed Inter Layer Data Transmission in 3D Stacked ICs
Author(s)
Beanato, Giulia
Advisor(s)
Date
2014
Publisher
Lausanne, EPFL
Language
English
Other identifier(s)
urn: urn:nbn:ch:bel-epfl-thesis6278-1
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSI2 - Integrated Systems Laboratory (STI/IC)
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Scientific production and competences > EPFL Theses
Work produced at EPFL
Published
Theses
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Scientific production and competences > EPFL Theses
Work produced at EPFL
Published
Theses
Record creation date
2014-08-18