000198723 001__ 198723
000198723 005__ 20180128045430.0
000198723 0247_ $$2doi$$a10.1109/Ted.2014.2345097
000198723 022__ $$a0018-9383
000198723 02470 $$2ISI$$a000342909800029
000198723 037__ $$aARTICLE
000198723 245__ $$aGeneralized Charge Based Model of Double Gate Junctionless FETs Including Inversion
000198723 260__ $$aPiscataway$$bInstitute of Electrical and Electronics Engineers$$c2014
000198723 269__ $$a2014
000198723 300__ $$a5
000198723 336__ $$aJournal Articles
000198723 520__ $$aIn this brief, we have developed a charge-based model for the symmetric double gate junctionless FET that also accounts for the inversion layer when the gate voltage is biased in deep depletion. Basically, this approach represents a generalization of a former model and aims at giving a unified description of junctionless field effect transistors beyond the domain of operation for which they have been designed. In addition to its interest for providing technology design rules, the new model is able to explain the unexpected increase in the gate capacitance when biasing the device in deep depletion.
000198723 6531_ $$aTerms— Junctionless
000198723 6531_ $$adouble gate
000198723 6531_ $$ananowire
000198723 6531_ $$acapacitance
000198723 6531_ $$ainversion
000198723 700__ $$0247158$$aJazaeri, Farzan$$g202103
000198723 700__ $$0247157$$aBarbut, Lucian$$g196382
000198723 700__ $$0241224$$aSallese, Jean-Michel$$g106334
000198723 773__ $$j61$$k10$$q3553-3557$$tIEEE Transactions on Electron Devices
000198723 909C0 $$0252605$$pEDLAB
000198723 909CO $$ooai:infoscience.tind.io:198723$$particle$$pSTI
000198723 917Z8 $$x202103
000198723 917Z8 $$x202103
000198723 917Z8 $$x144315
000198723 917Z8 $$x148230
000198723 937__ $$aEPFL-ARTICLE-198723
000198723 973__ $$aEPFL$$rREVIEWED$$sPUBLISHED
000198723 980__ $$aARTICLE