Configurable Logic Gates Using Polarity Controlled Silicon Nanowire Gate-All-Around FETs

This work demonstrates the first fabricated 4-transistor logic gates using polarity-configurable, gate-all- around silicon nanowire transistors. This technology enhances conventional CMOS functionality by adding the degree of free- dom of dynamic polarity control (n or p-type). In addition, devices are fabricated with low, uniform doping profiles, reducing constraints at scaled technology nodes. We demonstrate through measurements and simulations how this technology can be applied to fabricate logic gates with fewer resources than CMOS. Specifically, full-swing output XOR and NAND logic gates are demonstrated using the same physical 4-transistor circuit.


Publié dans:
IEEE Electron Device Letters, 35, 8, 880-882
Année
2014
Publisher:
Piscataway, Institute of Electrical and Electronics Engineers
ISSN:
0741-3106
Mots-clefs:
Laboratoires:




 Notice créée le 2014-03-27, modifiée le 2019-03-16

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