Low-power RF modeling of a 40nm CMOS technology using BSIM6

The state-of-the-art scaled down CMOS processes have led to devices with extremely high Ft reaching several hundreds of GHz. This high F t can be traded with power consumption by moving the operating point towards weak inversion with Ft reaching tens of GHz, high enough for many modern RF applications. The new charge-based bulk compact MOSFET model BSIM6 was developed with the objective to provide an accurate description of the modern nanoscale CMOS technologies including weak and moderate inversion regions. This paper, compares BSIM6 against RF measurements made on an advanced 40 nm CMOS process, particularly focusing on very low bias conditions. The results validate the model's accuracy and demonstrate its suitability for ultra-low power RF IC design. © 2013 Department of Microelectronics and Computer Science, Technical University of Lodz.

Published in:
Proceedings of the 20th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2013, null, null, 57-62
Presented at:
Mixed Design of Integrated Circuits and Systems (MIXDES), Gdynia, Poland, 20-22 June 2013

 Record created 2014-03-13, last modified 2018-09-13

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