A methodology for architecture exploration and performance analysis using system level design languages and rapid architecture profiling


Published in:
Proceedings of the International Symposium on Industrial Embedded Systems, 95 - 102
Presented at:
SIES'08, Le Grande Motte, France, 11-13 June 2008
Year:
2008
ISBN:
978-1-4244-1994-4
Laboratories:




 Record created 2014-02-11, last modified 2018-01-28


Rate this document:

Rate this document:
1
2
3
 
(Not yet reviewed)