Configurable Low-Latency Interconnect for Multi-core Clusters
2013
Details
Title
Configurable Low-Latency Interconnect for Multi-core Clusters
Author(s)
Beanato, Giulia ; Loi, Igor ; De Micheli, Giovanni ; Leblebici, Yusuf ; Benini, Luca
Published in
VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design
Pages
107-124
Date
2013
Publisher
Springer Berlin Heidelberg
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Scientific production and competences > I&C - School of Computer and Communication Sciences > IINFCOM > LSI1 - Integrated Systems Laboratory 1 (STI/IC)
Work produced at EPFL
Book chapters
Published
Scientific production and competences > I&C - School of Computer and Communication Sciences > IINFCOM > LSI1 - Integrated Systems Laboratory 1 (STI/IC)
Work produced at EPFL
Book chapters
Published
Record creation date
2014-01-21