Low phase noise, low power CMOS frequency synthesizers for miniature atomic clocks
2013
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Title
Low phase noise, low power CMOS frequency synthesizers for miniature atomic clocks
Author(s)
Zhao, Yazhou
Advisor(s)
Date
2013
Publisher
Lausanne, EPFL
Keywords
miniature atomic clock; frequency synthesizer; phase noise; fractional-N phase-locked loop (PLL); application specified integrated circuit (ASIC); voltage-controlled oscillator (VCO); phase/frequency detector (PFD); charge pump (CP); frequency resolution; sigma-delta modulator (SDM); dual-mode; phase detector (PD); trans-conductance amplifier (OTA); linear integration; error tracking capability; hybrid VCO; transmission line; impedance matching; Allan Deviation; clock stability
Language
English
Other identifier(s)
urn: urn:nbn:ch:bel-epfl-thesis5843-1
Record Appears in
Scientific production and competences > EPFL Theses
Work produced at EPFL
Published
Theses
Work produced at EPFL
Published
Theses
Record creation date
2013-08-21