Heavily Doped Junctionless Vertical Slit FETs with Slit Width Below 20 nm

This paper reports an alternative simple fabrication process for twin gate junctionless Vertical Slit Field Effect Transistors. N-type devices have been successfully manufactured on SOI substrates with a doping density 5×1018 atoms/cm3. The devices demonstrate up to six decades of Ion/Ioff ratio and a sub- threshold swing of 90 mV/decade relative to a slit width of approximately 10 nm.


Published in:
Mixed Design of Integrated Circuits and Systems (MIXDES), 2013 Proceedings of the 20th International Conference, 397-400
Presented at:
Mixed Design of Integrated Circuits & Systems, 2013 MIXDES'13. MIXDES-20th International Conference, Gdynia, Poland, 20-22 June, 2013
Year:
2013
ISBN:
978-83-63578-00-8
Keywords:
Laboratories:




 Record created 2013-08-07, last modified 2018-01-28


Rate this document:

Rate this document:
1
2
3
 
(Not yet reviewed)