Modeling and Design Space of Junctionless Symmetric DG MOSFETs With Long Channel

We investigate the technological con-strains and design limitations of ultrathin body junctionless dou- ble gate MOSFET (JL DG MOSFET). Relationships between the silicon thickness and the doping concentration compatible with design requirements in terms of OFF-state-current and voltages are obtained and validated with TCAD simulations. This set of analytical expressions can be used as a guideline for technology optimization of JL DG MOSFETS.


Publié dans:
IEEE Transactions on Electron Devices, 60, 7, 2120-2127
Année
2013
Publisher:
Piscataway, Ieee-Inst Electrical Electronics Engineers Inc
ISSN:
1557-9646
Mots-clefs:
Laboratoires:




 Notice créée le 2013-08-07, modifiée le 2018-01-28


Évaluer ce document:

Rate this document:
1
2
3
 
(Pas encore évalué)