Evaluation of the BSIM6 compact MOSFET model's scalability in 40nm CMOS technology
2012
Details
Title
Evaluation of the BSIM6 compact MOSFET model's scalability in 40nm CMOS technology
Author(s)
Chalkiadaki, M.-A. ; Mangla, A. ; Enz, C. C. ; Chauhan, Y. S. ; Karim, M. A. ; Venugopalan, S. ; Niknejad, A. ; Hu, C.
Published in
2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)
Pages
50-53
Conference
ESSDERC 2012 - 42nd European Solid State Device Research Conference, Bordeaux, France, 17-21 09 2012
Date
2012
Publisher
IEEE
Laboratories
LSI2
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSI2 - Integrated Systems Laboratory (STI/IC)
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date
2013-03-27