Dual-threshold-voltage configurable circuits with three-independent gate silicon nanowire FETs

We extend ambipolar silicon nanowire transistors by using three independent gates and show an efficient approach to implement dual-threshold-voltage configurable circuits. Polarity and threshold voltage of uncommitted devices are determined by applying different bias patterns to the three gates. Uncommitted logic gates can thus be configured to implement different logic functions for dual-threshold-voltage design using a wiring scheme, to target either high-performance or low-leakage applications. Synthesis of benchmark circuits with these devices shows comparable performance and 54% reduction of leakage power consumption compared to FinFET technology

Published in:
Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS)
Presented at:
IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, May 19-23, 2013

 Record created 2013-01-15, last modified 2018-01-28

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