Conference paper

Polarity Control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs

We fabricated and characterized ambipolar Silicon Nanowire (SiNW) FET transistors featuring two independent Gate-All-Around (GAA) electrodes and vertically stacked SiNW channels. One of the gate electrodes is exploited to dynamically select the polarity of the devices (n or p-type). Measurement results on silicon show Ion/Ioff > 106 and S≈64mV/dec (70mV/dec) for p-type and n-type operation in the same device. We show that XOR operation is embedded in the device characteristic, and we implement for the first time a fully functional 2-transistor XOR gate to demonstrate the potential of this technology for logic circuit design.


    • EPFL-CONF-181182

    Record created on 2012-09-10, modified on 2017-05-12

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