000180185 001__ 180185
000180185 005__ 20190316235439.0
000180185 020__ $$a978-1-4673-0697-3
000180185 02470 $$2ISI$$a000309227500033
000180185 037__ $$aCONF
000180185 245__ $$aEnhanced Wafer Matching Heuristics for 3-D ICs
000180185 269__ $$a2012
000180185 260__ $$aNew York$$bIeee$$c2012
000180185 300__ $$a1
000180185 336__ $$aConference Papers
000180185 490__ $$aProceedings of the European Test Symposium
000180185 700__ $$0241997$$aPavlidis, Vasileios$$g188258
000180185 700__ $$0242420$$aXu, Hu$$g183772
000180185 700__ $$0240269$$aDe Micheli, Giovanni$$g167918
000180185 7112_ $$aIEEE 17th European Test Symposium$$cAnnecy, France$$dMay 28- June 1, 2012
000180185 773__ $$q178$$tProceedings of the IEEE 17th European Test Symposium
000180185 8564_ $$s197460$$uhttps://infoscience.epfl.ch/record/180185/files/ETS_12.pdf$$yn/a$$zn/a
000180185 909C0 $$0252283$$pLSI1$$xU11140
000180185 909CO $$ooai:infoscience.tind.io:180185$$pIC$$pconf$$pSTI$$qGLOBAL_SET
000180185 917Z8 $$x112915
000180185 937__ $$aEPFL-CONF-180185
000180185 973__ $$aEPFL$$rREVIEWED$$sPUBLISHED
000180185 980__ $$aCONF