Conference paper

A new single photon avalanche diode in CMOS high-voltage technology

we report a new single photon avalanche diode (SPAD) implemented in a commercially available high-voltage CMOS technology. The SPAD was designed with relatively low-doped layers to form p-/n- junction, instead of commonly adopted p+/n- or n+/p- structures. We used the readily available layers as given by the technology without any customization or post-processing. Careful design measures were taken to ensure planar junction breakdown. Compared with a p+/n- diode, a p-/n- SPAD has relative deep junction, wide depletion region, and thus improves probability of photon detection. The measurement shows a maximum photon detection efficiency of 34.4%, and remains above 20% from 400nm to 620nm, whereas the dark count rate is only 50cps at room temperature with 5V excess voltage.


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