Multigate Buckled Self-Aligned Dual Si Nanowire MOSFETs on Bulk Si for High Electron Mobility

In this paper, we report for the first time making multi-gate buckled self-aligned dual Si nanowires including two sub-100 nm cross-section cores on bulk Si substrate using optical lithography, hard mask/spacer technology and local oxidation. 0.8 GPa uniaxial tensile stress was measured on the buckled dual nanowires using micro-Raman spectroscopy. The buckled multi-gate dual Si nanowires show excellent electrical characteristics e.g. 62 mV/dec. and 42% low-field electron mobility enhancement due to uniaxial tensile stress in comparison to the non-strained device, all at VDS=50 mV and 293 K.


Published in:
IEEE Transactions on Nanotechnology, 11, 902-906
Year:
2012
Publisher:
Piscataway, Institute of Electrical and Electronics Engineers
ISSN:
1536-125X
Keywords:
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 Record created 2012-06-19, last modified 2018-03-17

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