Details
Title
Strain as a CMOS technology booster
Author(s)
Najmzadeh, Mohammad
Pagination
10
Date
2009
Keywords
Strain; Local stressor; Global stressor; CMOS booster; CMOS downscaling; Contact etch stop layer (CESL); Shallow trench isolation (STI); Strained SOI; Metal gate strain; Stress memorization technique; Local oxidation; Diamond like carbon (DLC); Uniaxial/biaxial tensile/compressive stress in the channel; Carrier mobility boost; Epitaxial S/D; Silicidation; longitudinal/transverse stress in the channel
Note
Grade: 6.0/6.0.
Laboratories
IEL
Record Appears in
Scientific production and competences > STI - School of Engineering > STI Archives > IEL - Institute of Electrical Engineering
Work produced at EPFL
Technical Reports
Published
Work produced at EPFL
Technical Reports
Published
Record creation date
2012-03-05