000174385 001__ 174385
000174385 005__ 20190316235302.0
000174385 0247_ $$2doi$$a10.1109/TMM.2012.2231668
000174385 022__ $$a1520-9210
000174385 02470 $$2ISI$$a000313875500004
000174385 037__ $$aARTICLE
000174385 245__ $$aMarkov Decision Process Based Energy-Efficient On-Line Scheduling for Slice Parallel Video Decoders on Multicore Systems
000174385 269__ $$a2013
000174385 260__ $$bIeee-Inst Electrical Electronics Engineers Inc$$c2013$$aPiscataway
000174385 300__ $$a11
000174385 336__ $$aJournal Articles
000174385 520__ $$aWe consider the problem of energy-efficient on-line scheduling for slice-parallel video decoders on multicore systems. We assume that each of the processors are Dynamic Voltage Frequency Scaling (DVFS) enabled such that they can independently trade off performance for power, while taking the video decoding workload into account. In the past, scheduling and DVFS policies in multi-core systems have been formulated heuristically due to the inherent complexity of the on-line multicore scheduling problem. The key contribution of this report is that we rigorously formulate the problem as a Markov decision process (MDP), which simultaneously takes into account the on-line scheduling and per-core DVFS capabilities; the power consumption of the processor cores and caches; and the loss tolerant and dynamic nature of the video decoder’s traffic. In particular, we model the video traffic using a Direct Acyclic Graph (DAG) to capture the precedence constraints among frames in a Group of Pictures (GOP) structure, while also accounting for the fact that frames have different display/decoding deadlines and non-deterministic decoding complexities. The objective of the MDP is to minimize long-term power consumption subject to a minimum Quality of Service (QoS) constraint related to the decoder’s throughput. Although MDPs notoriously suffer from the curse of dimensionality, we show that, with appropriate simplifications and approximations, the complexity of the MDP can be mitigated. We implement a slice-parallel version of H.264 on a multiprocessor ARM (MPARM) virtual platform simulator, which provides cycle-accurate and bus signal-accurate simulation for different processors. We use this platform to generate realistic video decoding traces with which we evaluate the proposed on-line scheduling algorithm in Matlab.
000174385 6531_ $$amulticore
000174385 6531_ $$aenergy optimization
000174385 6531_ $$aon-line scheduling
000174385 6531_ $$amultimedia
000174385 6531_ $$aembedded systems
000174385 6531_ $$aDVFS
000174385 6531_ $$avideo decoder
000174385 6531_ $$amarkov decision process
000174385 6531_ $$aH.264 decoder
000174385 700__ $$aMastronarde, Nicholas
000174385 700__ $$0245383$$g206311$$aKanoun, Karim
000174385 700__ $$0240268$$g169199$$aAtienza Alonso, David
000174385 700__ $$aFrossard, Pascal$$g101475$$0241061
000174385 700__ $$avan der Schaar, Mihaela
000174385 773__ $$j15$$tIEEE Transactions on Multimedia$$k2$$q268-278
000174385 8564_ $$uhttps://infoscience.epfl.ch/record/174385/files/TMM2013-06374263.pdf$$zPostprint$$s2254243$$yPostprint
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000174385 909CO $$qGLOBAL_SET$$pSTI$$particle$$ooai:infoscience.tind.io:174385
000174385 917Z8 $$x101475
000174385 917Z8 $$x169199
000174385 917Z8 $$x160527
000174385 917Z8 $$x101475
000174385 937__ $$aEPFL-ARTICLE-174385
000174385 973__ $$rREVIEWED$$sPUBLISHED$$aEPFL
000174385 980__ $$aARTICLE