We report a novel device which exploits the internally combined quantum mechanical Band-To-Band and Barrier Tunneling mechanisms to achieve improved performances and overcome the intrinsic low current drive limitations of conventional Tunnel FETs and the 60 mV/decade limitation of MOSFETs at room temperature. The new structure, including an ultra-thin dielectric between metal source and silicon channel, allows for sub-60 mV/dec average subthreshold slope (SS ~43 mV/dec) and a uniquely high Ion/Ioff ratio (~10^11). The device principle and the potential performances are investigated by numerical simulation. We evaluate the impact of the tunneling layer thickness on device performances and compare single and double gate architectures. Finally, we evaluate the impact of device gate length scaling on its performances, which is different from Tunnel FET: we observe an improvement of SS and Ion values at smaller gate lengths.