Tunneling path impact on semi-classical numerical simulations of TFET devices

In this work a non-local band-to-band tunnelling model has been implemented into a full-band Monte Carlo simulator. Two different approaches for the choice of the tunnelling path have been implemented and their impact on the transfer characteristics of different Tunnel FET structures is investigated. In both the SOI and the DG TFET architectures we have simulated, up to 1 order of magnitude of underestimation in the current and up to 15% of difference in the value of the Subthreshold Slope can be found according to the choice of the tunnelling path. © 2011 IEEE.


Published in:
Ulis 2011 Ultimate Integration on Silicon, 1-4
Presented at:
2011 12th International Conference on Ultimate Integration on Silicon (ULIS), Cork, Ireland, 14-16 03 2011
Year:
2011
Publisher:
IEEE
Keywords:
Laboratories:




 Record created 2012-01-19, last modified 2018-03-17


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