Alternative Design Methodologies for the Next Generation Logic Switch (invited paper)

Next generation logic switch devices are ex- pected to rely on radically new technologies mainly due to the increasing difficulties and limitations of state-of-the-art CMOS switches, which, in turn, will also require innovative design methodologies that are distinctly different from those used for CMOS technologies. In this paper, three alternative emerging technologies are showcased in terms of their re- quirements for design implementation and in terms of poten- tial advantages. First, a CMOS evolutionary approach based on vertically-stacked gate-all-around Si nanowire FETs is discussed. Next, an alternative design methodology based on ambipolar carbon nanotube FETs is presented. Finally, a novel approach based on the recently discovered memristive devices is presented, offering the possibility of combining memory and logic functions.


Publié dans:
International Conference on Computer-Aided Design (ICCAD-2011)
Présenté à:
International Conference on Computer-Aided Design, San Jose, California, USA, November 7-10
Année
2011
Publisher:
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa
Mots-clefs:
Note:
Invited Paper
Laboratoires:




 Notice créée le 2011-11-24, modifiée le 2019-03-16

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