High pressure-rated channels allow microfluidic assays to be performed on a smaller footprint while keeping the throughput, thanks to the higher enabled flow rates, opening perspectives for cost-effective integration of CMOS chips to microfluidics circuits. Accordingly, this note introduces an easy, low-cost and efficient method for realizing high pressure microfluidics-to-CMOS integration. First, we report a new low temperature (280 °C) Parylene-C wafer bonding technique, where O2 plasma-treated Parylene-C bonds directly to Si3N4 with an average bonding strength of 23 MPa. The technique works for silicon wafers with nitride surface and uses a single layer of Parylene-C deposited only on one wafer, and allows microfluidic structures to be easily formed by directly bonding to the nitride passivation layer of the CMOS devices. Exploiting this technology, we demonstrated a microfluidic chip burst pressure as high as 16 MPa, while metal electrode structures on the silicon wafer remained functional after bonding.